New CS@Mines department head named IEEE Fellow
Iris Bahar was honored for her contributions to power-aware and noise-tolerant nanoscale computing systems
The new head of the Computer Science Department at Colorado School of Mines has been named a fellow of the Institute of Electrical and Electronics Engineers (IEEE).
Iris Bahar, who officially joined Mines in January, was honored by IEEE for her “contributions to modeling and design of power-aware and noise-tolerant nanoscale computing systems.”
Elevation to Fellow is a distinction reserved for a select group of IEEE members with extraordinary accomplishments in the organization’s fields of interest. Less than 0.1 percent of IEEE voting members receive the honor every year.
An expert in computer system design and design automation, Bahar was an early pioneer in exploring computer architecture level techniques to reduce power dissipation, without impacting performance. Similarly, she was one of the first to investigate the use of probabilistic techniques for modeling and synthesis of noisy and unreliable computing systems.
Bahar holds a PhD in electrical and computer engineering from the University of Colorado Boulder and an M.S. in electrical engineering and B.S. in computer engineering, both from the University of Illinois Urbana-Champaign.
Before joining Mines at the start of this year, she was a professor at Brown University, with joint appointments in the School of Engineering and Department of Computer Science. She was the 2019 recipient of the Marie R. Pistilli Women in Engineering Achievement Award and the Brown University School of Engineering Award for Excellence in Teaching in Engineering.
Over the years, a main theme of her research has been energy efficient and reliable computing, from robots, to high-end processors, embedded systems and emerging technologies. More recently, her research interests have evolved to include robotics, machine learning and computer data security. Current research in the Bahar Lab includes robust and computationally efficient scene perception, and concurrent near-memory processing architectures.